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- In this research work, frequency response of the gear box in the medium duty lathe machine is studied using transfer functions. The effect of the torque acting at a particular rotor on the amplitude of vibration of the other rotors is studied. Initially, equation of motion is developed for the multi-rotor system in the gearbox and later, Laplace transforms are applied to find the transfer functions. Torque acting at various rotors is also calculated. The obtained characteristic equation and the transfer functions are solved for poles and zeros (frequencies to attenuate the inputs at every rotor) by writing programming in MATLAB. Plots of the frequency response curves are plotted by writing the programming in MATLAB and the final conclusions are drawn.
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In Communication system, the system capacity and performance are adversely affected and degraded by interference. Hence, power control plays a prominent role in an interference-limited system, which increases the efficiency by mitigating the adjacent and co-Channel interference in the system. In this paper, primarily power control is said to be used in maintaining the acceptable Carrier to Interference Ratio (CIR) by meeting some Quality of service (QoS) requirements Objective function that is defined as maximum channel capacity in a power constraint scenario. The signals in a radio channel undergo different propagation effects like reflection, refraction, scattering and shadowing. Hence, the distribution of users across subcarrier groups as well as their transmission powers within a given cell has a significant effect on how users and power are accordingly distributed elsewhere in the network to maximize the capacity of the system thereby enhancing its performance
Even a small transition delays and little faults create major concern in digital circuits. It Produce greater impact on not only for simple memory but also for most of the memory applications. This paper presents an error-detection method for difference-set cyclic codes with majority logic decoding. Majority logic decodable codes are suitable for memory applications due to their capability to correct a large number of errors. However, they require a large decoding time that impacts memory performance. The proposed fault-detection method significantly reduces memory access time when there is no error in the data read. The technique uses the majority logic decoder itself to detect failures, which makes the area overhead minimal and keeps the extra power consumption low. The proposed method detects the occurrences of single error, double error ,triple error in the received code words obtained from the memory system.
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